View source for AES-Z7MB-7Z020-SOM-G


[http://zedboard.org/product/microzed MicroZed™] is a low-cost development board based on the [http://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html Xilinx Zynq®-7000] All Programmable SoC. Its unique design allows it to be used as both a stand-alone evaluation board for basic SoC experimentation, or combined with a carrier card as an embeddable system-on-module (SOM). MicroZed contains two I/O headers that provide connection to two I/O banks on the programmable logic (PL) side of the Zynq®-7000 All Programmable SoC device. In stand-alone mode, these 100 PL I/O are inactive. When plugged into a carrier card, the I/O are accessible in a manner defined by the carrier card design.


<gallery mode="packed" heights="250">
Image:MIcroZed Front.jpg| MicroZed Populated Top.
Image:MicroZed Rear.jpg| MicroZed Populated Bottom.
</gallery>


'''Note:''' There is nothing which makes the Zynq specifically suited for high bandwidth or camera applications etc. What makes it special is the combination of a microcontroller (hardened arm cores) and FPGA fabric. For us, the main reason to go with the Zynq was the availability of the MicroZed for a reasonable price.

If we would have built our own 'MicroZed' equivalent (which we'll probably do one day) it probably wouldn't use a Zynq.

Power - The Microzed draws around 8-15W, from our experience, depending on what the FPGA/CPUs are doing.


'''Decision making:''' In case you're wondering why we use Xilinx FPGA, and about other small form factors like Microsemi Igloo - We wanted to find a reasonably priced FPGA development board which also has a small size for the Beta. This narrowed the available options down to boards like the MicroZed and the [https://www.parallella.org/ Parallela]. Back then, it was a bonus that we already knew the ZYNQ from the Zedboard (as it had been used on the [[AXIOM Alpha]] - The prototype proof of concept for AXIOM Beta). But there is really no special reason for Xilinx, we also use the Lattice FPGAs on our boards for routing e.g. [https://wiki.apertus.org/index.php/Beta_Main_Board AXIOM Beta Main Board].


'''Licensing:'''

All FPGAs can be used with the 'free' licenses (WebLicense, etc), this was something we made sure of, otherwise it wouldn't be very suitable for FOSS/OSH projects.

Both the Nexys ([https://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/ Nexys 4 DDR] has an Artix XC7A100T in CSG324 which is covered by the free Web License) and the Zedboard also covered by the WebLicense.  You won't get special Xilinx IP for free though.


See more reading and exploration of options at [[Zynq Development Boards]].


==Documentation, Schematics, BOM, etc.==

http://zedboard.org/support/documentation/1519

[https://wiki.apertus.org/index.php/File:AES-Z7MB-7Z020-SOM-G_MicroZed_Datasheet.pdf Datasheet]


==Customisations for AXIOM Beta==

* D4 and D8 are removed and D8 is replaced with a 0R shunt. This change reduces wasted energy (mostly heat from the diodes) and makes USB power supply more stable. Primarily, though, it's not optimum for the camera's USB (serial console) to power the MicroZed. Instead, these changes make it possible to supply 5V via the Microheader.

* A custom heat-sink (  https://github.com/apertus-open-source-cinema/beta-hardware/tree/master/Microzed-Heatsink ) and matching fan (Fonsoning FSY31S05M 30x30x10mm 5V 0.12A) are installed to assist with cooling of U9.

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[[category: AXIOM Beta]]
[[category: PCBs]]
[[category: Zynq]]
[[category: Development boards]]
[[category: Heat-sink]]