View source for AXIOM Beta/Camera Structure/Plugin Modules

The pinout is as follows:

[[File:Pcie_conn.png|right|600px]]
[[File:Plugin_layout.png|right|150px]]

{| class="wikitable" style="width: 40%;
! Pin Name
! Function
! Pin Name
! Function
|-
| A1
| style="background-color:#000000; color:#ffffff;" | GND
| B1
| style="background-color:#ffc702;" | I²C SDA
|-
| A2
| style="background-color:#34cdf9; color:#000000;" | LVDS0 +
| B2
| style="background-color:#ffc702;" | I²C SCL
|-
| A3
| style="background-color:#34cdf9; color:#000000;" | LVDS0 -
| B3
| style="background-color:#fd6864;" | VCC I²C (typically 3v3)
|-
| A4
| style="background-color:#000000; color:#ffffff;" | GND
| B4
| style="background-color:#9aff99;" | IO 0 (typically 3v3)
|-
| A5
| style="background-color:#34cdf9; color:#000000;" | LVDS1 +
| B5
| style="background-color:#9aff99;" | IO 1 (typically 3v3)
|-
| A6
| style="background-color:#34cdf9; color:#000000;" | LVDS1 -
| B6
| style="background-color:#9aff99;" | IO 2 (typically 3v3)
|-
| A7
| style="background-color:#000000; color:#ffffff;" | GND
| B7
| style="background-color:#9aff99;" | IO 3 (typically 3v3)
|-
| A8
| style="background-color:#34cdf9; color:#000000;" | LVDS2 +
| B8
| style="background-color:#9aff99;" | IO 4 (typically 3v3)
|-
| A9
| style="background-color:#34cdf9; color:#000000;" | LVDS2 -
| B9
| style="background-color:#9aff99;" | IO 5 (typically 3v3)
|-
| A10
| style="background-color:#000000; color:#ffffff;" | GND
| B10
| style="background-color:#9aff99;" | IO 6 (typically 3v3)
|-
| A11
| Power Good; NC
| B11
| style="background-color:#9aff99;" | IO 7 (typically 3v3)
|-
| A12
| style="background-color:#000000; color:#ffffff;" | GND
| B12
| style="background-color:#fd6864;" | 5V
|-
| A13
| style="background-color:#34cdf9; color:#000000;" | LVDS3 +
| B13
| style="background-color:#fd6864;" | VCC (typically 3v3)
|-
| A14
| style="background-color:#34cdf9; color:#000000;" | LVDS3 -
| B14
| style="background-color:#fd6864;" | VCCIO LVDS (typically 2v4)
|-
| A15
| style="background-color:#000000; color:#ffffff;" | GND
| B15
| style="background-color:#000000; color:#ffffff;" | GND
|-
| A16
| style="background-color:#34cdf9; color:#000000;" | LVDS4 +
| B16
| style="background-color:#34cdf9;" | LVDS5 +
|-
| A17
| style="background-color:#34cdf9; color:#000000;" | LVDS4 -
| B17
| style="background-color:#34cdf9;" | LVDS5 -
|-
| A18
| style="background-color:#000000; color:#ffffff;" | GND
| B18
| style="background-color:#000000; color:#ffffff;" | GND
|}