Difference between revisions of "Beta Main Board"
From apertus wiki
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[[File:Top.png | thumb | 500px | PCB | [[File:Top.png | thumb | 500px | PCB Bottom]] | ||
[[File:Bottom.png | thumb | 500px | PCB | [[File:Bottom.png | thumb | 500px | PCB Top]] | ||
[[File:BetaMainboard 0.32 BOTTOM.jpg | thumb | 500px | PCB | [[File:BetaMainboard 0.32 BOTTOM.jpg | thumb | 500px | PCB Bottom with components]] | ||
[[File:BetaMainboard 0.32 TOP.jpg | thumb | 500px | PCB | [[File:BetaMainboard 0.32 TOP.jpg | thumb | 500px | PCB Top with components]] | ||
=About= | =About= | ||
Revision as of 17:40, 6 January 2017
1 About
The Beta Mainboard deals with interfacing the plugin modules and shields and therefore acts as a kind of data crossroad.
The purpose of the two Lattice FPGAs (the so called routing fabrics) is to handle all the low speed GPIO stuff required for plugin modules, shields and CSO without sacrificing valuable Zynq GPIOs.
1.1 Revisions
Current:
AXIOM Beta Main Board V0.36 R1.2
Archive: