Difference between revisions of "CMV12000 Register Blocks"
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|} | |} | ||
0x601xxxxx Capture Control/Address Gen. (Read/Write Data) | 0x601xxxxx Capture Control/Address Gen. (Read/Write Data) | ||
== | {| class="wikitable" border="1" | ||
0x60100100 RW [31:0] 0x18000000 Write Buffer 0 Base | |- | ||
! Address | |||
! Type | |||
! Bits | |||
! Capture Control / Address Gen. | |||
! Description | |||
|- | |||
| 0x60100100 | |||
0x60100104 | |||
| RW | |||
RW | |||
| [31:0] | |||
[31:0] | |||
| 0x18000000 | |||
0x19FF0000 | |||
| Write Buffer 0 Base | |||
Write Buffer 0 End Pattern | |||
|- | |||
| 0x60100108 | |||
0x6010010C | |||
| RW | |||
RW | |||
| [31:0] | |||
[31:0] | |||
| 0x1A000000 | |||
0x1BFF0000 | |||
| Write Buffer 1 Base | |||
Write Buffer 1 End Pattern | |||
|- | |||
| 0x60100110 | |||
0x60100114 | |||
| RW | |||
RW | |||
| [31:0] | |||
[31:0] | |||
| 0x1C000000 | |||
0x1DFF0000 | |||
| Write Buffer 2 Base | |||
Write Buffer 2 End Pattern | |||
|- | |||
|0x60100118 | |||
0x6010011C | |||
| RW | |||
RW | |||
| [31:0] | |||
[31:0] | |||
| 0x1E000000 | |||
0x1FFF0000 | |||
| Write Buffer 3 Base | |||
Write Buffer 3 End Pattern | |||
|- | |||
| 0x60100120 | |||
| RW | |||
| [31:0] | |||
| 0x00000080 | |||
| Column Increment | |||
|- | |||
| 0x60100124 | |||
| RW | |||
| [31:0] | |||
| 0x00000080 | |||
| Row Increment | |||
|- | |||
| 0x60100128 | |||
| RW | |||
| [11:0] | |||
| 0x0000007E | |||
| Column Burst Count | |||
|- | |||
| 0x6010012C | |||
| RW | |||
RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
<br> RW | |||
| [31:24] 0xFC | |||
[21] 0x1 | |||
<br> [20] 0x1 | |||
<br> [19:16] 0xF | |||
<br> [15:12] 0xF | |||
<br> [8] 0x0 | |||
<br> [7] 0x0 | |||
<br> [6] 0x0 | |||
<br> [5] 0x0 | |||
<br> [4] 0x0 | |||
<br> [0] 0x0 | |||
| | |||
|Write Address Strobe | |||
RCN Clip Overflow | |||
<br> RCN Clip Underflow | |||
<br> Writer Enable | |||
<br> Buffer Enable | |||
<br> SerDes Reset | |||
<br> Buffer Switch Request | |||
<br> Buffer Load Request | |||
<br> Buffer Reset Request | |||
<br> Buffer Block Request | |||
<br> Fifo Reset | |||
|- | |||
| 0x60100130 | |||
| RW | |||
| [11:0] 0xA95 | |||
| | |||
| LVDS Training Pattern | |||
|} | |||
------------------------------------------------------------------------ | ------------------------------------------------------------------------ | ||
------------------------------------------------------------------------ | ------------------------------------------------------------------------ | ||
0x60100134 RW [18:16] 0x07 Active Data Mask | 0x60100134 RW [18:16] 0x07 Active Data Mask |
Revision as of 23:31, 13 March 2014
Sensor Pipeline
Address | Description |
---|---|
0x600xxxxx | CMV SPI register mapping |
0x601xxxxx | Capture Control/Address Gen. |
0x602xxxxx | LVDS input delay registers |
0x603xxxxx | RCN noise correction LUTs |
0x604xxxxx | CMV/AXI PLL dynalic reconf (disabled) |
0x605xxxxx | Linearization LUTs |
Display Pipeline
Address | Description |
---|---|
0x800xxxxx | Display Scan Generator |
0x801xxxxx | Display Control/Address Gen. |
0x802xxxxx | Component Matrix 4x4 |
0x803xxxxx | Gamma Correction LUTs |
0x804xxxxx | HDMI PLL dynamic reconf |
0x805xxxxx | Illumination Control (testing) |
0x600xxxxx CMV SPI register mapping
Address | Type | Bits | Description |
---|---|---|---|
0x60000000 | RW | [15:0] | CMV Register 0 |
0x60000004 | RW | [15:0] | CMV Register 1 |
.......... | ...... | .............. | |
0x600001F8 | RW | [15:0] | CMV Register 126 |
0x600001FC | RO | [15:0] | CMV Register 127 |
0x601xxxxx Capture Control/Address Gen. (Read Only Data)
Address | Type | Bits | Capture Control / Address Gen. |
---|---|---|---|
0x60100000 | RO
RO
|
[31:8] 0x524547
[7:4] 0x0
|
Identifier "REG"
Revision 0
|
0x60100004 | RO | [31:0] | User Access |
0x60100008 | RO | [31:0] | LVDS Match (ch 0-31) |
0x6010000C | RO | [31:0] | LVDS Mismatch (ch 0-31) |
0x60100010 | RO | [31:0] | Current Writer Address |
0x60100014 | RO
RO
|
[31:30]
[29:28] 0x0
|
Write Buffer Selection
Zero Padding
|
0x60100018 | RO
RO
|
[31]
[30:28]
|
Capture Sequencer Done
Zero Padding
|
0x601xxxxx Capture Control/Address Gen. (Read/Write Data)
Address | Type | Bits | Capture Control / Address Gen. | Description |
---|---|---|---|---|
0x60100100
0x60100104 |
RW
RW |
[31:0]
[31:0] |
0x18000000
0x19FF0000 |
Write Buffer 0 Base
Write Buffer 0 End Pattern |
0x60100108
0x6010010C |
RW
RW |
[31:0]
[31:0] |
0x1A000000
0x1BFF0000 |
Write Buffer 1 Base
Write Buffer 1 End Pattern |
0x60100110
0x60100114 |
RW
RW |
[31:0]
[31:0] |
0x1C000000
0x1DFF0000 |
Write Buffer 2 Base
Write Buffer 2 End Pattern |
0x60100118
0x6010011C |
RW
RW |
[31:0]
[31:0] |
0x1E000000
0x1FFF0000 |
Write Buffer 3 Base
Write Buffer 3 End Pattern |
0x60100120 | RW | [31:0] | 0x00000080 | Column Increment |
0x60100124 | RW | [31:0] | 0x00000080 | Row Increment |
0x60100128 | RW | [11:0] | 0x0000007E | Column Burst Count |
0x6010012C | RW
RW
|
[31:24] 0xFC
[21] 0x1
|
Write Address Strobe
RCN Clip Overflow
| |
0x60100130 | RW | [11:0] 0xA95 | LVDS Training Pattern |
0x60100134 RW [18:16] 0x07 Active Data Mask RW [10:8] 0x07 Capture Data Mask RW [2:0] 0x07 Capture Data Value
0x60100138 RW [23:16] 0x00 LED Override Mask (0-7) RW [8] 0x0 Done LED Value RW [7:0] 0x00 LED Override Value (0-7)
0x6010013C RW [28] 0x0 Button Down Override Enable RW [27] 0x0 Button Up Override Enable RW [26] 0x0 Button Right Override Enable RW [25] 0x0 Button Left Override Enable RW [24] 0x0 Button Center Override Enable RW [23:16] 0x00 Switch Override Enable (0-7) RW [12] 0x0 Button Down Override RW [11] 0x0 Button Up Override RW [10] 0x0 Button Right Override RW [9] 0x0 Button Left Override RW [8] 0x0 Button Center Override RW [7:0] 0x00 Switch Override (0-7)