Difference between revisions of "Elgato CAM LINK 4K"
From apertus wiki
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</gallery> | </gallery> | ||
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[[File:Layers-pinout.jpg | 1150px]] | [[File:Layers-pinout.jpg | 1150px]] | ||
https://docs.google.com/spreadsheets/d/17SmOY7Npzz2Hj1kz4DWKzrBAl0PYMWU085NeT3AY0D4/edit#gid=0 | * https://docs.google.com/spreadsheets/d/17SmOY7Npzz2Hj1kz4DWKzrBAl0PYMWU085NeT3AY0D4/edit#gid=0 | ||
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a dump of the SPI communication (and the decoded flash data) can be found here: | a dump of the SPI communication (and the decoded flash data) can be found here: | ||
http://vserver.13thfloor.at/Stuff/ELGATO/boot_decode.txt | * http://vserver.13thfloor.at/Stuff/ELGATO/boot_decode.txt | ||
* http://vserver.13thfloor.at/Stuff/ELGATO/boot.vcd.xz | |||
==Further files/links== | |||
* http://vserver.13thfloor.at/Stuff/ELGATO/ | |||
* https://github.com/ktemkin/camlink-re | |||
==Credits== | |||
https:// | * https://twitter.com/GregDavill | ||
Revision as of 22:38, 17 December 2019
1 PCB
PCB Side 1.
PCB Side 2 (mirrored).
It is reported to be an 8 layer PCB. Probably atleast a 2-3+ HDI.
PCB Side View
PCB Layer 1/8
PCB Layer 2/8
PCB Layer 3/8
PCB Layer 4/8 (Now from the back, flipped for ease of alignment.) Another solid ground plane.
PCB Layer 5/8 (flipped) Power planes.
PCB Layer 6/8 (flipped) Two sneaky DDR memory pairs routed on this layer.
PCB Layer 7/8 (flipped) ground plane - Note: 2 cutouts in this plane, that seem to correspond to SW signals of DCDC buck converters. I've never seen that before? Maybe to reduce capacitance on the SW pin?
PCB Layer 8/8 (flipped) bottom layer
Pinout Mapping (WIP):
2 Firmware
a dump of the SPI communication (and the decoded flash data) can be found here:
- http://vserver.13thfloor.at/Stuff/ELGATO/boot_decode.txt
- http://vserver.13thfloor.at/Stuff/ELGATO/boot.vcd.xz
3 Further files/links