1 CMV12000 Register Blocks

1.1 Sensor Pipeline

<css>

 th.pmod { width:4em; border:0px ! important ; color:#000; }

 tr:nth-child(2n+1)
   {
    background:#ffc;
     }
 td.vdd { color:#F00 }
 td.gnd { color:#000 }

 td.p1p { color:#44F }
 td.p1n { color:#00A }

 td.p2p { color:#FA3 }
 td.p2n { color:#E72 }

 td.p3p { color:#4A3 }
 td.p3n { color:#070 }

 td.p4p { color:#A46 }
 td.p4n { color:#734 }

</css>

PMOD JA (200R)
6	5	4	3	2	1
VDD	GND	L11P	L10N	L8P	L10P
VDD	GND	L11N	L9N	L9P	L8N
12	11	10	9	8	7

Address	Description
0x600xxxxx	CMV SPI register mapping
0x601xxxxx	Capture Control/Address Gen.
0x602xxxxx	LVDS input delay registers
0x603xxxxx	RCN noise correction LUTs
0x604xxxxx	CMV/AXI PLL dynalic reconf (disabled)
0x605xxxxx	Linearization LUTs

Display Pipeline
Address	Description
0x800xxxxx	Display Scan Generator
0x801xxxxx	Display Control/Address Gen.
0x802xxxxx	Component Matrix 4x4
0x803xxxxx	Gamma Correction LUTs
0x804xxxxx	HDMI PLL dynamic reconf
0x805xxxxx	Illumination Control (testing)

0x600xxxxx CMV SPI Register Mapping
Address	Type	Bits	Description
0x60000000	RW	[15:0]	CMV Register 0
0x60000004	RW	[15:0]	CMV Register 1
..........		......	..............
0x600001F8	RW	[15:0]	CMV Register 126
0x600001FC	RO	[15:0]	CMV Register 127

0x601xxxxx Capture Control/Address Gen. (Read Only Data)
Address	Type	Bits	Default Value	Description
0x60100000	RO RO RO	[31:8] [7:4] [3:0]	0x524547 0x0 0x8	Identifier "REG" Revision 0 Split x0100
0x60100004	RO	[31:0]		User Access
0x60100008	RO	[31:0]		LVDS Match (ch 0-31)
0x6010000C	RO	[31:0]		LVDS Mismatch (ch 0-31)
0x60100010	RO	[31:0]		Current Writer Address
0x60100014	RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO	[31:30] [29:28] [27:24] [23:22] [21] [20] [19] [18] [17] [16] [15:13] [12] [11] [10] [9] [8] [7:0]	0x0 0x0 0x0	Write Buffer Selection Zero Padding Writer Inactive (0-3) Zero Padding Fifo Write Error Fifo Read Error Fifo Full Fifo High Fifo Low Fifo Empty Zero Padding Button Down State Button Up State Button Right State Button Left State Button Center State Switch State (0-7)
0x60100018	RO RO RO RO	[31] [30:28] [27:16] [15:0]		Capture Sequencer Done Zero Padding CSeq Frame Count Zero Padding

0x601xxxxx Capture Control/Address Gen. (Read/Write Data)
Address	Type	Bits	Default Value	Description
0x60100100 0x60100104	RW RW	[31:0] [31:0]	0x18000000 0x19FF0000	Write Buffer 0 Base Write Buffer 0 End Pattern
0x60100108 0x6010010C	RW RW	[31:0] [31:0]	0x1A000000 0x1BFF0000	Write Buffer 1 Base Write Buffer 1 End Pattern
0x60100110 0x60100114	RW RW	[31:0] [31:0]	0x1C000000 0x1DFF0000	Write Buffer 2 Base Write Buffer 2 End Pattern
0x60100118 0x6010011C	RW RW	[31:0] [31:0]	0x1E000000 0x1FFF0000	Write Buffer 3 Base Write Buffer 3 End Pattern
0x60100120	RW	[31:0]	0x00000080	Column Increment
0x60100124	RW	[31:0]	0x00000080	Row Increment
0x60100128	RW	[11:0]	0x0000007E	Column Burst Count
0x6010012C	RW RW RW RW RW RW RW RW RW RW RW	[31:24] [21] [20] [19:16] [15:12] [8] [7] [6] [5] [4] [0]	0xFC 0x1 0x1 0xF 0xF 0x0 0x0 0x0 0x0 0x0 0x0	Write Address Strobe RCN Clip Overflow RCN Clip Underflow Writer Enable Buffer Enable SerDes Reset Buffer Switch Request Buffer Load Request Buffer Reset Request Buffer Block Request Fifo Reset
0x60100130	RW	[11:0]	0xA95	LVDS Training Pattern
0x60100134	RW RW RW	[18:16] [10:8] [2:0]	0x07 0x07 0x07	Active Data Mask Capture Data Mask Capture Data Value
0x60100138	RW RW RW	[23:16] [8] [7:0]	0x00 0x0 0x00	LED Override Mask (0-7) Done LED Value LED Override Value (0-7)
0x6010013C	RW RW RW RW RW RW RW RW RW RW RW RW	[28] [27] [26] [25] [24] [23:16] [12] [11] [10] [9] [8] [7:0]	0x0 0x0 0x0 0x0 0x0 0x00 0x0 0x0 0x0 0x0 0x0 0x00	Button Down Override Enable Button Up Override Enable Button Right Override Enable Button Left Override Enable Button Center Override Enable Switch Override Enable (0-7) Button Down Override Button Up Override Button Right Override Button Left Override Button Center Override Switch Override (0-7)