Beta Main Board
From apertus wiki
1 About
The Beta Mainboard deals with interfacing the plugin modules and shields and therefore acts as a kind of data crossroad.
It features two Beta CSO slots - one on each PCB side - directly behind the image sensor center. This is intended for IMU sensors or future extensions.
The purpose of the two Lattice FPGAs (the so called routing fabrics) is to handle all the low speed GPIO stuff required for plugin modules, shields and CSO without sacrificing valuable Zynq GPIOs.
1.1 Revisions
Current:
AXIOM Beta Main Board V0.36 R1.2
Archive: