Difference between revisions of "IRC Team Meeting 2017-08-28"
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(Created page with "* Bertl reported about promising developments with test made in Vivado HLS (High Level Synthesis) to speed up firmware development and modifications dramatically * Bertl repor...") |
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* Bertl is working on the second generation SFE Testing hardware (v0.2) which uses an array of 15 PIC micro-controller to verify SFE functionality | * Bertl is working on the second generation SFE Testing hardware (v0.2) which uses an array of 15 PIC micro-controller to verify SFE functionality | ||
* Bertl built the first test hardware for a future eMMC plugin module | * Bertl built the first test hardware for a future eMMC plugin module | ||
* Felix shared the news that the grant to | * Felix shared the news that the grant to work on gateware and firmware of an AXIOM Beta SDI 6G module has been officially approved | ||
* Sebastian reported about delays with TT 13.1 release | * Sebastian reported about delays with TT 13.1 release | ||
Full Log: http://irc.apertus.org/index.php?day=28&month=08&year=2017#49 | Full Log: http://irc.apertus.org/index.php?day=28&month=08&year=2017#49 | ||
Latest revision as of 17:28, 28 August 2017
- Bertl reported about promising developments with test made in Vivado HLS (High Level Synthesis) to speed up firmware development and modifications dramatically
- Bertl reported about tests with the TE0714 boards and their gigabit transceivers -> testing showed that 3Gbps is absolutely no problem and 6Gbps can be achieved with some fine tuning
- Bertl is working on the second generation SFE Testing hardware (v0.2) which uses an array of 15 PIC micro-controller to verify SFE functionality
- Bertl built the first test hardware for a future eMMC plugin module
- Felix shared the news that the grant to work on gateware and firmware of an AXIOM Beta SDI 6G module has been officially approved
- Sebastian reported about delays with TT 13.1 release
Full Log: http://irc.apertus.org/index.php?day=28&month=08&year=2017#49