Difference between revisions of "CMV12000 Register Blocks"

Latest revision as of 08:28, 20 February 2024

Sensor Pipeline

Address	Description
0x600xxxxx	CMV SPI register mapping
0x601xxxxx	Capture Control/Address Gen.
0x602xxxxx	LVDS input delay registers
0x603xxxxx	RCN noise correction LUTs
0x604xxxxx	CMV/AXI PLL dynalic reconf (disabled)
0x605xxxxx	Linearization LUTs

Display Pipeline
Address	Description
0x800xxxxx	Display Scan Generator
0x801xxxxx	Display Control/Address Gen.
0x802xxxxx	Component Matrix 4x4
0x803xxxxx	Gamma Correction LUTs
0x804xxxxx	HDMI PLL dynamic reconf
0x805xxxxx	Illumination Control (testing)

0x600xxxxx CMV SPI Register Mapping
Address	Type	Bits	Description
0x60000000	RW	[15:0]	CMV Register 0
0x60000004	RW	[15:0]	CMV Register 1
..........		......	..............
0x600001F8	RW	[15:0]	CMV Register 126
0x600001FC	RO	[15:0]	CMV Register 127

0x601xxxxx Capture Control/Address Gen. (Read Only Data)
Address	Type	Bits	Default Value	Description
0x60100000	RO	[31:8]	0x524547	Identifier "REG"
0x60100000	RO	[7:4]	0x0	Revision 0
0x60100000	RO	[3:0]	0x8	Split x0100
.	.	.	.	.
0x60100004	RO	[31:0]		User Access
.	.	.	.	.
0x60100008	RO	[31:0]		LVDS Match (ch 0-31)
.	.	.	.	.
0x6010000C	RO	[31:0]		LVDS Mismatch (ch 0-31)
.	.	.	.	.
0x60100010	RO	[31:0]		Current Writer Address
.	.	.	.	.
0x60100014	RO	[31:30]		Write Buffer Selection
0x60100014	RO	[29:28]	0x0	Zero Padding
0x60100014	RO	[27:24]		Writer Inactive (0-3)
0x60100014	RO	[23:22]	0x0	Zero Padding
0x60100014	RO	[21]		Fifo Write Error
0x60100014	RO	[20]		Fifo Read Error
0x60100014	RO	[19]		Fifo Full
0x60100014	RO	[18]		Fifo High
0x60100014	RO	[17]		Fifo Low
0x60100014	RO	[16]		Fifo Empty
0x60100014	RO	[15:13]	0x0	Zero Padding
0x60100014	RO	[12]		Button Down State
0x60100014	RO	[11]		Button Up State
0x60100014	RO	[10]		Button Right State
0x60100014	RO	[9]		Button Left State
0x60100014	RO	[8]		Button Center State
0x60100014	RO	[7:0]		Switch State (0-7)
.	.	.	.	.
0x60100018	RO	[31]		Capture Sequence Drone
0x60100018	RO	[30:28]		Zero Padding
0x60100018	RO	[27:16]		CSeq Frame Count
0x60100018	RO	[15:0]		Zero Padding

0x601xxxxx Capture Control/Address Gen. (Read/Write Data)
Address	Type	Bits	Default Value	Description
0x60100100	RW	[31:0]	0x18000000	Write Buffer 0 Base
0x60100104	RW	[31:0]	0x19FF0000	Write Buffer 0 End Pattern
.	.	.	.	.
0x60100108	RW	[31:0]	0x1A000000	Write Buffer 1 Base
0x6010010C	RW	[31:0]	0x1BFF0000	Write Buffer 1 End Pattern
.	.	.	.	.
0x60100110	RW	[31:0]	0x1C000000	Write Buffer 2 Base
0x60100114	RW	[31:0]	0x1DFF0000	Write Buffer 2 End Pattern
.	.	.	.	.
0x60100118	RW	[31:0]	0x1E000000	Write Buffer 3 Base
0x6010011C	RW	[31:0]	0x1FFF0000	Write Buffer 3 End Pattern
.	.	.	.	.
0x60100120	RW	[31:0]	0x00000080	Column Increment
.	.	.	.	.
0x60100124	RW	[31:0]	0x00000080	Row Increment
.	.	.	.	.
0x60100128	RW	[11:0]	0x0000007E	Column Burst Count
.	.	.	.	.
0x6010012C	RW	[31:24]	0xFC	Write Address Strobe
0x6010012C	RW	[21]	0x1	RCN Clip Overflow
0x6010012C	RW	[20]	0x1	RCN Clip Underflow
0x6010012C	RW	[19:16]	0xF	Writer Enable
0x6010012C	RW	[15:12]	0xF	Buffer Enable
0x6010012C	RW	[8]	0x0	SerDes Reset
0x6010012C	RW	[7]	0x0	Buffer Switch Request
0x6010012C	RW	[6]	0x0	Buffer Load Request
0x6010012C	RW	[5]	0x0	Buffer Reset Request
0x6010012C	RW	[4]	0x0	Buffer Block Request
0x6010012C	RW	[0]	0x0	Fifo Reset
.	.	.	.	.
0x60100130	RW	[11:0]	0xA95	LVDS Training Pattern
.	.	.	.	.
0x60100134	RW	[18:16]	0x07	Active Data Mask
0x60100134	RW	[10:8]	0x07	Capture Data Mask
0x60100134	RW	[2:0]	0x07	Capture Data Value
.	.	.	.	.
0x60100138	RW	[23:16]	0x00	LED Override Mask (0-7)
0x60100138	RW	[8]	0x0	Done LED Value
0x60100138	RW	[7]	0x00	LED Override Value (0-7)
.	.	.	.	.
0x6010013C	RW	[28]	0x0	Button Down Override Enable
0x6010013C	RW	[27]	0x0	Button Up Override Enable
0x6010013C	RW	[26]	0x0	Button Right Override Enable
0x6010013C	RW	[25]	0x0	Button Left Override Enable
0x6010013C	RW	[24]	0x0	Button Center Override Enable
0x6010013C	RW	[23:16]	0x00	Switch Override Enable (0-7)
0x6010013C	RW	[12]	0x0	Button Down Override
0x6010013C	RW	[11]	0x0	Button Up Override
0x6010013C	RW	[10]	0x0	Button Right Override
0x6010013C	RW	[9]	0x0	Button Left Override
0x6010013C	RW	[8]	0x0	Button Center Override
0x6010013C	RW	[7]	0x00	Switch Override (0-7)

0x602xxxxx LVDS Input Delay
Address	Type	Bits	Default Value	Description
0x60200000	WO	[31]	0x0	Bitslip Channel 0
0x60200000	RO	[29]		Pattern Match Channel 0
0x60200000	RO	[28]		Pattern Mismatch Channel 0
0x60200000	RW	[4:0]	0x0	Delay Value Channel 0
.	.	.	.	.
0x60200004				Same for Channel 1
..........				..............
0x6020007C				Same for Channel 31
0x60200080				Same for Control Channel
.	.	.	.	.
0x60200084	WO	[31]	0x0	Word Slip/Phase for all Channels
0x60200084	RW	[4:0]	0x0	Delay Value for LVDS Clock

0x6030xxxx Column Offset LUTs
Address	Type	Bits	Default Value	Description
0x60300000	RW	[11:0]	0x000	Signed 12bit Offset (Column 0)
.	.	.	.	.
0x60300004	RW	[11:0]	0x000	Signed 12bit Offset (Column 2)
0x60300008	RW	[11:0]	0x000	Signed 12bit Offset (Column 4)
..........				..............
0x60301FF8	RW	[11:0]	0x000	Signed 12bit Offset (Column 4092)
0x60301FFC	RW	[11:0]	0x000	Signed 12bit Offset (Column 4094)
.	.	.	.	.
0x60302000	RW	[11:0]	0x000	Signed 12bit Offset (Column 1)
.	.	.	.	.
0x60302004	RW	[11:0]	0x000	Signed 12bit Offset (Column 3)
0x60302008	RW	[11:0]	0x000	Signed 12bit Offset (Column 5)
..........				..............
0x60303FF8	RW	[11:0]	0x000	Signed 12bit Offset (Column 4093)
0x60303FFC	RW	[11:0]	0x000	Signed 12bit Offset (Column 4095)

0x6030xxxx Row Offset LUTs
Address	Type	Bits	Default Value	Description
0x60304000	RW	[11:0]	0x000	Signed 12bit Offset (Row 0)
.	.	.	.	.
0x60304004	RW	[11:0]	0x000	Signed 12bit Offset (Row 2)
0x60304008	RW	[11:0]	0x000	Signed 12bit Offset (Row 4)
..........				..............
0x60305FF8	RW	[11:0]	0x000	Signed 12bit Offset (Row 4092)
0x60305FFC	RW	[11:0]	0x000	Signed 12bit Offset (Row 4094)
.	.	.	.	.
0x60306000	RW	[11:0]	0x000	Signed 12bit Offset (Row 1)
.	.	.	.	.
0x60306004	RW	[11:0]	0x000	Signed 12bit Offset (Row 3)
0x60306008	RW	[11:0]	0x000	Signed 12bit Offset (Row 5)
..........				..............
0x60307FF8	RW	[11:0]	0x000	Signed 12bit Offset (Row 4093)
0x60307FFC	RW	[11:0]	0x000	Signed 12bit Offset (Row 4095)

0x6050xxxx Linearization LUTs
Address	Type	Bits	Default Value	Description
0x60500000	RW	[17:0]	0x0000	Signed 18bit (Chan 0, Val 0)
.	.	.	.	.
0x60500004	RW	[17:0]	0x0000	Signed 18bit (Chan 0, Val 1)
..........				..............
0x60503FFC	RW	[17:0]	0x0000	Signed 18bit (Chan 0, Val 4095)
.	.	.	.	.
0x60504000	RW	[17:0]	0x0000	Signed 18bit (Chan 1, Val 0)
.	.	.	.	.
0x60504004	RW	[17:0]	0x0000	Signed 18bit (Chan 1, Val 1)
..........				..............
0x60507FFC	RW	[17:0]	0x0000	Signed 18bit (Chan 1, Val 4095)
.	.	.	.	.
0x60508000	RW	[17:0]	0x0000	Signed 18bit (Chan 2, Val 0)
.	.	.	.	.
0x60508004	RW	[17:0]	0x0000	Signed 18bit (Chan 2, Val 1)
..........				..............
0x6050BFFC	RW	[17:0]	0x0000	Signed 18bit (Chan 2, Val 4095)
.	.	.	.	.
0x6050C000	RW	[17:0]	0x0000	Signed 18bit (Chan 3, Val 0)
.	.	.	.	.
0x6050C004	RW	[17:0]	0x0000	Signed 18bit (Chan 3, Val 1)
..........				..............
0x6050FFFC	RW	[17:0]	0x0000	Signed 18bit (Chan 3, Val 4095)

0x800xxxxx Scan Generator (Read Only Data)
Address	Type	Bits	Default Value	Description
0x80000000	RO	[31:8]	0x53434E	Identifier "SCN"
0x80000000	RO	[7:4]	0x0	Revision 0
0x80000000	RO	[3:0]	0x8	Split x0100
.	.	.	.	.
0x80000004	RO	[31:28]	0x0	Zero Padding
0x80000004	RO	[27:16]		Scan Frame Counter
0x80000004	RO	[15:8]	0x0	Zero Padding
0x80000004	RO	[7:0]		Current Events

0x800xxxxx Scan Generator (Read/Write Data)
Address	Type	Bits	Default Value	Description
0x80000100	RW	[27:16]	0x000	Total Height
0x80000100	RW	[11:0]	0x000	Total Width
.	.	.	.	.
0x80000104	RW	[11:0]	0x000	Total Frames
.	.	.	.	.
0x80000108	RW	[27:16]	0x000	Hor. Display End
0x80000108	RW	[11:0]	0x000	Hor. Display Start
.	.	.	.	.
0x8000010C	RW	[27:16]	0x000	Vert. Display End
0x8000010C	RW	[11:0]	0x000	Vert. Display Start
.	.	.	.	.
0x80000110	RW	[27:16]	0x000	Hor. Sync End
0x80000110	RW	[11:0]	0x000	Hor. Sync Start
.	.	.	.	.
0x80000114	RW	[27:16]	0x000	Vert. Sync End
0x80000114	RW	[11:0]	0x000	Vert. Sync Start
.	.	.	.	.
0x80000118	RW	[27:16]	0x000	Hor. Data End
0x80000118	RW	[11:0]	0x000	Hor. Data Start
.	.	.	.	.
0x8000011C	RW	[27:16]	0x000	Vert. Data End
0x8000011C	RW	[11:0]	0x000	Vert. Data Start
.	.	.	.	.
0x80000120	RW	[27:16]	0x000	Event Location 1 (Hor)
0x80000120	RW	[11:0]	0x000	Event Location 0 (Hor)
.	.	.	.	.
0x80000124	RW	[27:16]	0x000	Event Location 3 (Hor)
0x80000124	RW	[11:0]	0x000	Event Location 2 (Hor)
.	.	.	.	.
0x80000128	RW	[27:16]	0x000	Event Location 5 (Vert)
0x80000128	RW	[11:0]	0x000	Event Location 4 (Vert)
.	.	.	.	.
0x8000012C	RW	[27:16]	0x000	Event Location 7 (Vert)
0x8000012C	RW	[11:0]	0x000	Event Location 6 (Vert)
.	.	.	.	.
0x80000130	RW	[31:24]	0x00	Event 3 Configuration
0x80000130	RW	[23:16]	0x00	Event 2 Configuration
0x80000130	RW	[15:8]	0x00	Event 1 Configuration
0x80000130	RW	[7:0]	0x00	Event 0 Configuration
.	.	.	.	.
0x80000134	RW	[31:24]	0x00	Event 7 Configuration
0x80000134	RW	[23:16]	0x00	Event 6 Configuration
0x80000134	RW	[15:8]	0x00	Event 5 Configuration
0x80000134	RW	[7:0]	0x00	Event 4 Configuration
.	.	.	.	.
0x80000138	RW	[5]	0	Clip Range Overflow
0x80000138	RW	[4]	0	Clip Range Underflow
0x80000138	RW	[0]	0	Even/Odd Swap

@@ Line 3: / Line 3: @@
 == Sensor Pipeline ==
-<css>
-  th.reg { width:4em; border:0px ! important ; color:#000; }
-  tr:nth-child(2n+1)
-    {
-     background:#E3E3E3
-      }
-  td.odd { color:#F00 }
-  td.even { color:#000 }
-</css>
 {| class="wikitable" style="text-align:center"