Axiom beta power board v0.8 test

From apertus wiki
Revision as of 21:39, 19 February 2015 by Sebastian (talk | contribs) (→‎Notes)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

1 Files

http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_power_board_v0.8_test.sch

http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_power_board_v0.8_test.brd

http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_power_board_v0.8_test.libraries.tar.xz

http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_power_board_v0.8_test.pdf

2 Notes

board to board signal names:

PWR-NW:
1_MP-NW-2	N$114 		name missing
2_M_V_NW	3_M_V_NW
3_MP-NW-1	N$113 		name missing
4_W_VW		1_W_VW
5 NC
6_W_VW		2_W_VW
7 NC
8_N_VW		1_N_VW
PWR-NE:
1_N_I2C_V	4_N_I2C_V
2_E_SDI_V	3_E_SDI_V
3_N_SPI_V	2_N_SPI_V
4_E_I2C_V	4_E_I2C_V
5_N_VE		2_N_VE
6 NC
7_N_VN		1_N_VN
8 NC
PWR-SE:
1_MP-SE-1	N$240 		name missing
2_M_V_SE 	3_M_V_SE
3_MP-SE-3	N$235		name missing 
4_E_VE 	1_E_VE
5 NC
6_E_VE  	2_E_VE
7 NC
8_S_VE		1_S_VE
PWR-SW:
1_S_I2C_V	4_S_I2C_V
2_JTAG_V	3_JTAG_V
3_S_SPI_V	2_S_SPI_V
4_W_I2C_V	1_W_I2C_V
5_S_VW		2_S_VW
6 NC
7_S_VS		1_S_VS
8 NC
PB-NW:			silkscreen label missing
2_A_SCL	1_B_SCL		line name missmatch
4_A_SDA	3_B_SDA		line name missmatch
PB-SE:			silkscreen label missing
2_B_SCL	1_A_SCL		line name missmatch
4_B_SDA	3_A_SDA		line name missmatch