m
m
Line 1: Line 1:
 
[[File:Top.png | thumb | 500px | PCB Bottom]]
 
 
[[File:Bottom.png | thumb | 500px | PCB Top]]
 
 
[[File:BetaMainboard 0.32 BOTTOM.jpg | thumb | 500px | PCB Bottom with components]]
 
 
 
[[File:BetaMainboard 0.32 TOP.jpg | thumb | 500px | PCB Top with components]]
 
[[File:BetaMainboard 0.32 TOP.jpg | thumb | 500px | PCB Top with components]]
  
Line 16: Line 9:
 
The purpose of the two Lattice FPGAs (the so called routing fabrics) is to handle all the low speed GPIO stuff required for plugin modules, shields and CSO without
 
The purpose of the two Lattice FPGAs (the so called routing fabrics) is to handle all the low speed GPIO stuff required for plugin modules, shields and CSO without
 
sacrificing valuable Zynq GPIOs.
 
sacrificing valuable Zynq GPIOs.
 +
 +
<gallery mode="packed" heights="180">
 +
Image:BetaMainboard 0.32 BOTTOM.jpg| PCB Bottom with components.
 +
Image:Top.png| PCB Top.
 +
Image:Bottom.png| PCB Bottom.
 +
</gallery>
  
  
Line 44: Line 43:
 
[[Category:Beta Main Board]]
 
[[Category:Beta Main Board]]
 
[[Category:Main Board]]
 
[[Category:Main Board]]
 +
[[category: AXIOM Beta]]
 +
[[category: PCBs]]

Revision as of 12:12, 20 November 2017

PCB Top with components

1 About

The Beta Mainboard deals with interfacing the plugin modules and shields and therefore acts as a kind of data crossroad.

It features two Beta CSO slots - one on each PCB side - directly behind the image sensor center. This is intended for IMU sensors or future extensions.

The purpose of the two Lattice FPGAs (the so called routing fabrics) is to handle all the low speed GPIO stuff required for plugin modules, shields and CSO without sacrificing valuable Zynq GPIOs.


1.1 Revisions

Current:

AXIOM Beta Main Board V0.36 R1.2



Archive:

AXIOM Beta Main Board V0.35

AXIOM Beta Main Board V0.33

AXIOM Beta Main Board V0.29

AXIOM Beta Board 100 v0.16

axiom beta board 100 v0.15 test