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==PCB==
 
<gallery mode="packed" heights="800">
 
<gallery mode="packed" heights="800">
 
Image:Elgato cam link 4k side a.jpg | PCB Side 1.
 
Image:Elgato cam link 4k side a.jpg | PCB Side 1.
 
Image:Elgato cam link 4k side b.jpg| PCB Side 2 (mirrored).
 
Image:Elgato cam link 4k side b.jpg| PCB Side 2 (mirrored).
 
</gallery>
 
</gallery>
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It is reported to be an  8 layer PCB. Probably atleast a 2-3+ HDI.
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<gallery mode="packed" heights="300">
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Image:8layers.jpg | PCB Side View
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Image:Layer0.jpg | PCB Layer 1/8
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Image:IMG_7370-2.jpg| PCB Layer 2/8
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Image:IMG_7379.jpg| PCB Layer 3/8
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</gallery>
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Credit: https://twitter.com/GregDavill
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'''Pinout Mapping (WIP):'''
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[[File:Layers-pinout.jpg | 1150px]]
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https://docs.google.com/spreadsheets/d/17SmOY7Npzz2Hj1kz4DWKzrBAl0PYMWU085NeT3AY0D4/edit#gid=0
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==Firmware==
  
 
a dump of the SPI communication (and the decoded flash data) can be found here:
 
a dump of the SPI communication (and the decoded flash data) can be found here:

Revision as of 11:10, 15 December 2019

1 PCB

It is reported to be an 8 layer PCB. Probably atleast a 2-3+ HDI.

Credit: https://twitter.com/GregDavill


Pinout Mapping (WIP):

Layers-pinout.jpg

https://docs.google.com/spreadsheets/d/17SmOY7Npzz2Hj1kz4DWKzrBAl0PYMWU085NeT3AY0D4/edit#gid=0


2 Firmware

a dump of the SPI communication (and the decoded flash data) can be found here:

http://vserver.13thfloor.at/Stuff/ELGATO/boot_decode.txt

http://vserver.13thfloor.at/Stuff/ELGATO/boot.vcd.xz